- Source: Zen 4
Zen 4 is the name for a CPU microarchitecture designed by AMD, released on September 27, 2022. It is the successor to Zen 3 and uses TSMC's N6 process for I/O dies, N5 process for CCDs, and N4 process for APUs. Zen 4 powers Ryzen 7000 performance desktop processors (codenamed "Raphael"), Ryzen 8000G series mainstream desktop APUs (codenamed "Phoenix"), and Ryzen Threadripper 7000 series HEDT and workstation processors (codenamed "Storm Peak"). It is also used in extreme mobile processors (codenamed "Dragon Range"), thin & light mobile processors (codenamed "Phoenix" and "Hawk Point"), as well as EPYC 8004/9004 server processors (codenamed "Siena", "Genoa" and "Bergamo").
Zen 4 is the first microarchitecture whose chips (Ryzen 7000) use the AM5 motherboard socket.
Features
Like its predecessor, Zen 4 in its Desktop Ryzen variants features one or two Core Complex Dies (CCDs) built on TSMC's 5 nm process and one I/O die built on 6 nm. Previously, the I/O die on Zen 3 was built on GlobalFoundries' 14 nm process for EPYC and 12 nm process for Ryzen. Zen 4's I/O die includes integrated RDNA 2 graphics for the first time on any Zen architecture. Zen 4 marks the first utilization of the 5 nm process for x86-based desktop processors and also marks the return of 5.0 GHz clock rate to any AMD processors for the first time since the AMD FX-9590.
On all platforms, Zen 4 supports only DDR5 memory and LPDDR5X in mobile, with support for DDR4 and LPDDR4X dropped. Additionally, Zen 4 supports new AMD EXPO SPD profiles for more comprehensive memory tuning and overclocking by the RAM manufacturers. Unlike Intel's XMP, EXPO is marketed as an open, license and royalty-free standard for describing memory kit parameters, such as operating frequency, timings and voltages. It allows to encode a wider set of timings to achieve better performance and compatibility. However, XMP memory profiles are still supported. EXPO can also support Intel processors.
All Zen 4 Ryzen desktop processors feature 28 (24 usable + 4 reserved) PCI Express 5.0 lanes. This means that a discrete GPU can be connected by 16 PCIe lanes or two GPUs by 8 PCIe lanes each. Additionally, there are now 2 x 4 lane PCIe interfaces, most often used for M.2 storage devices. Whether the lanes connecting the GPUs in the mechanical x16 slots are executed as PCIe 4.0 or PCIe 5.0 can be configured by the mainboard manufacturers. Finally, 4 PCIe 5.0 lanes are reserved for connecting the south bridge chip or chipset.
Zen 4 is the first AMD microarchitecture to support AVX-512 instruction set extension. Most 512-bit vector instructions are split in two and executed by the 256-bit SIMD execution units internally. The two halves execute in parallel on a pair of execution units and are still tracked as a single micro-OP (except for stores), which means the execution latency isn't doubled compared to 256-bit vector instructions. There are four 256-bit execution units, which gives a maximum throughput of two 512-bit vector instructions per clock cycle, e.g. one multiplication and one addition. The maximum number of instructions per clock cycle is doubled for vectors of 256 bits or less. Load and store units are also 256 bits each, retaining the throughput of up to two 256-bit loads or one store per cycle that was supported by Zen 3. This translates to up to one 512-bit load per cycle or one 512-bit store per two cycles.
Other features and improvements, compared to Zen 3, include:
L1 Branch Target Buffer (BTB) size increased by 50%, to 1.5K entries. Each entry is now able to store up to two branch targets, provided that the first branch is a conditional branch and the second branch is located within the same aligned 64-byte cache line as the first one.
L2 BTB increased to 7K entries.
Improved direct and indirect branch predictors.
OP cache size increased by 69%, from 4K to 6.75K OPs. The OP cache is now able to produce up to 9 macro-OPs per cycle (up from 6).
Re-order buffer (ROB) is increased by 25%, to 320 instructions.
Integer register file increased to 224 registers, FP/vector register file increased to 192 registers. FP/vector register file widened to 512 bits to support AVX-512. Added a new mask register file, capable of storing 68 mask registers.
Load queue size increased by 22%, to 88 pending loads.
L2 cache is doubled, from 512 KiB to 1 MiB per core, 8-way associative.
Automatic IBRS, where indirect branch restricted speculation mode is automatically enabled and disabled when control enters and leaves Ring 0 (kernel mode). This reduces the cost of user/kernel mode transitions.
~13% IPC increase on average.
Up to 5.7 GHz max core frequency.
Memory speeds up to DDR5-5200 and LPDDR5X-7500 are officially supported.
In Ryzen 7000 desktop processors and Ryzen 7045HX mobile processors, the integrated GPU contains two RDNA 2 Compute Units running at up to 2.2 GHz.
Supports up to four display outputs, including HDMI 2.1 and DisplayPort 2 interfaces, but possible to attach more displays with discrete GPU.
5-level memory paging support for page table
Products
= Desktop
=
Raphael
On August 29, 2022, AMD announced four Zen 4-based Ryzen 7000 series desktop processors. The four Ryzen 7000 processors that were launched on September 27, 2022 consist of the Ryzen 5 7600X, Ryzen 7 7700X, and two Ryzen 9 CPUs: the 7900X and 7950X. The processors feature between 6 and 16 cores.
A further three models were added to the Ryzen 7000 desktop processors lineup on January 10, 2023, after a keynote by AMD at CES that announced them alongside 3D V-Cache variants of Ryzen 7 and Ryzen 9 processors, which drop the X in the name of the first CPUs in the lineup. These three models are the Ryzen 5 7600, Ryzen 7 7700, and Ryzen 9 7900, which feature a lower TDP of 65 W, and come bundled with stock coolers, unlike the X-suffix processors.
The Ryzen 9 7900X3D and 7950X3D processors with 3D V-Cache were released on February 28, 2023, followed by the Ryzen 7 7800X3D on April 6.
Common features of Ryzen 7000 desktop CPUs:
Socket: AM5.
All the CPUs support DDR5-5200 in dual-channel mode.
L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
L2 cache: 1 MB per core.
All the CPUs support 28 PCIe 5.0 lanes. 4 of the lanes are reserved as link to the chipset.
Includes integrated RDNA 2 GPU on the I/O die with 2 CUs and clock speeds of 400 MHz (base), 2.2 GHz (boost). Models with "F" suffixes are without iGPUs.
Fabrication process: TSMC N5 FinFET (N6 FinFET for the I/O die).
Phoenix
The Phoenix desktop APU's were launched on January 8, 2024 as the "Ryzen 8000G" series for the AM5 socket and marketed as first desktop processor to feature a dedicated AI Accelerator branded as "Ryzen AI".
On April 1, 2024, AMD quietly released the Ryzen 8000 series of desktop processors without integrated graphics.
Common features of Ryzen 8000 desktop CPUs:
Socket: AM5.
All the CPUs support DDR5-5200 RAM in dual-channel mode.
L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
L2 cache: 1 MB per core.
All the CPUs support 20 PCIe 4.0 lanes. 4 of the lanes are reserved as link to the chipset.
No integrated graphics.
Fabrication process: TSMC 4 nm FinFET.
Common features of Ryzen 8000G desktop APUs:
Socket: AM5.
All the CPUs support DDR5-5200 RAM in dual-channel mode in 2x1R and 2x2R configuration, but only DDR5-3600 for 4x1R and 4x2R.
L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
L2 cache: 1 MB per core.
Models with Zen 4c cores (codenamed Phoenix 2) support 14 PCIe 4.0 lanes, while models without them support 20 lanes. 4 of the lanes are reserved as link to the chipset.
Includes integrated RDNA 3 GPU.
Includes XDNA AI Engine (Ryzen AI) on models without Zen 4c cores.
Fabrication process: TSMC 4 nm FinFET.
Storm Peak
Storm Peak is the codename given to Ryzen Threadripper 7000X HEDT and Ryzen Threadripper PRO 7000WX workstation processors, announced by AMD on October 19, 2023, and released on November 21, 2023. The Threadripper 7000X HEDT lineup consists of three models ranging from 24 to 64 cores, while the Threadripper PRO 7000WX workstation lineup encompasses six models ranging from 12 to 96 cores.
Common features of Ryzen 7000 HEDT/workstation CPUs:
Socket: sTR5.
Threadripper CPUs support DDR5-5200 in quad-channel mode while Threadripper PRO CPUs support DDR5-5200 in octa-channel mode with ECC support.
L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
L2 cache: 1 MB per core.
Threadripper CPUs support 48 PCIe 5.0 and 24 PCIe 4.0 lanes while Threadripper PRO CPUs support 128 PCIe 5.0 lanes. In addition, all processor models have 4 PCIe 4.0 lanes reserved as link to the chipset.
No integrated graphics.
Fabrication process: TSMC 5FF.
= Mobile
=
On January 4, 2023, AMD announced its Phoenix and Dragon Range series of mobile processors based on Zen 4 at the 2023 Consumer Electronics Show (CES). The Phoenix processors target the mainstream notebook segment, feature an AI accelerator branded as "Ryzen AI", similar to Apple's Neural Engine, and are of a monolithic chip design, while the Dragon Range processors target the high-end segment, providing core counts up to 16 cores and 32 threads, and are built on a multi-chip module design, utilizing an I/O die and up to two core complex dies (CCDs).
Phoenix
The Phoenix mobile processors are named as the "Ryzen 7040" series, and include U, H, and HS-suffix variants.
Common features of Ryzen 7040 notebook APUs:
Socket: FP7, FP7r2, FP8.
All the CPUs support DDR5-5600 or LPDDR5X-7500 in dual-channel mode.
L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
L2 cache: 1 MB per core.
PCIe 4.0 support.
Native USB 4 (40Gbps) Ports: 2
Native USB 3.2 Gen 2 (10Gbps) Ports: 2
Includes integrated RDNA 3 GPU.
Includes XDNA AI Engine (Ryzen AI).
Fabrication process: TSMC N4 FinFET.
Dragon Range
The Dragon Range mobile processors are named as the "Ryzen 7045" series, and consist of HX, and HX3D suffix models only.
Common features of Ryzen 7045 notebook CPUs:
Socket: FL1.
All the CPUs support DDR5-5200 in dual-channel mode.
L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
L2 cache: 1 MB per core.
All the CPUs support 28 PCIe 5.0 lanes.
Native USB 4 (40Gbps) Ports: 0
Native USB 3.2 Gen 2 (10Gbps) Ports: 4
Includes integrated RDNA 2 GPU on the I/O die with 2 CUs and clock speeds of 400 MHz (base), 2.2 GHz (boost).
Fabrication process: TSMC N5 FinFET (N6 FinFET for the I/O and graphics die).
Hawk Point
Hawk Point is a refresh of Phoenix mobile processors, named as the "Ryzen 8040" and "Ryzen 8045" series, released on December 6, 2023. It features a 60% faster NPU compared to the 7040 series.
Key features of Ryzen 8040 notebook APUs:
Socket: BGA (FP7, FP7r2 or FP8 type packages).
All models support DDR5-5600 or LPDDR5X-7500 in 128-bit "dual-channel" mode.
CPU uses Zen4 cores (Phoenix) or a combination of Zen4 and Zen4c cores (Phoenix2).
GPU uses the RDNA 3 (Navi 3) architecture.
Some models include first generation Ryzen AI NPU (XDNA).
All models support AVX-512 using a half-width 256-bit FPU.
PCIe 4.0 support.
Native USB 4 (40Gbps) Ports: 2
Native USB 3.2 Gen 2 (10Gbps) Ports: 2
Fabrication process: TSMC N4 FinFET.
= Server
=
Genoa, Bergamo, and Siena
On November 10, 2022, AMD launched the fourth generation (also known as the 9004 series) of EPYC server and data center processors based on the Zen 4 microarchitecture, codenamed Genoa. Genoa features between 16 and 96 Zen 4 cores, alongside PCIe 5.0 and DDR5, designed for enterprise and cloud data center clients.
Zen 4c is a variant of Zen 4 featuring smaller Zen 4 cores with lower clock frequencies, power usage, reduced L3 cache per core, and is intended to fit a greater number of cores in a given space. Zen 4c's smaller cores and higher core counts are designed for heavily multi-threaded workloads such as cloud computing.
A Zen 4c CCD features 16 smaller Zen 4c cores, divided into two Core Complexes (CCX) of 8 cores each. The 16 core Zen 4c CCD is 9.6% larger in area than the regular 8 core Zen 4 CCD. The Zen 4c CCD die size measures at 72.7 mm2 compared to the 66.3 mm2 die area for the Zen 4 CCD. However, an individual Zen 4c core has a smaller footprint than a Zen 4 core, meaning that a larger number of smaller cores can be fitted into the CCD. A Zen 4c core is about 35.4% smaller than a Zen 4 core. In addition to the reduced core footprint, die space is further saved in the Zen 4c CCD via the use of denser 6T dual-port SRAM cells and an overall reduction of L3 cache to 16 MB per 8-core CCX. Zen 4c cores have the same sized L1 and L2 caches as Zen 4 cores but the cache die area in Zen 4c cores is lower due to using denser SRAM and slower cache. The through-silicon via (TSV) connection arrays, which are used for vertical die stacking in Zen 4 3D V-Cache CCDs, are removed from the Zen 4c CCD to save silicon space. Even though the Zen 4c core has a smaller footprint, it is still able to maintain the same IPC as the larger Zen 4 core.
Unlike Intel's competing Gracemont E-cores, Zen 4c features 2 threads per core with simultaneous multithreading. The IPC of a Zen 4c core is closer to that of a Zen 4 core than an Intel Gracemont E-core IPC is to a P-core. Additionally, Zen 4c supports the same instruction sets as Zen 4 such as AVX-512 which is not the case with Intel's P-cores and E-cores. Intel's Gracemont E-cores lack support for the AVX-512 instructions contained in Golden Cove P-cores.
The Zen 4c core launched on June 13, 2023 with three Epyc Bergamo SKUs: 9734, 9754 and 9754S. The 9754S SKU features 128 Zen 4c cores but only 128 threads rather than the full 256 threads as simultaneous multithreading is disabled. Zen 4c launched in Epyc 8004 series processors, codenamed "Siena", on September 18, 2023. With up to 64 cores and 128 threads, Siena is designed with a lower cost platform in mind for entry-level server, edge computing, and telecommunications segments where higher energy efficiency is a priority.
Zen 4c made its debut outside of server processors in the Ryzen 7040U series, codenamed "Phoenix 2", which launched on November 2, 2023. The Ryzen 3 7440U and Ryzen 5 7545U processors feature both standard Zen 4 cores and smaller Zen 4c cores.
References
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