Flow to HDL GudangMovies21 Rebahinxxi LK21

      Flow to HDL tools and methods convert flow-based system design into a hardware description language (HDL) such as VHDL or Verilog. Typically this is a method of creating designs for field-programmable gate array, application-specific integrated circuit prototyping and digital signal processing (DSP) design. Flow-based system design is well-suited to field-programmable gate array design as it is easier to specify the innate parallelism of the architecture.


      History


      The use of flow-based design tools in engineering is a reasonably new trend. Unified Modeling Language is the most widely used example for software design. The use of flow-based design tools allows for more holistic system design and faster development. C to HDL tools and flow have a similar aim, but with C or C-like programming languages.


      Applications


      Most applications are ones which take too long with existing supercomputer architectures. These include bioinformatics, CFD, financial processing and oil and gas survey data analysis. Embedded applications that require high performance or real-time data processing are also an area of use. System-on-a-chip design can also be done using this flow.


      Examples


      Xilinx System Generator from Xilinx
      StarBridge VIVA from defunct
      Nimbus from defunct Exsedia


      External links


      [1] an overview of flows by Daresbury Labs.
      [2] Xilinx's ESL initiative, some products listed and C to VHDL tools.


      See also


      Application Specific Integrated Circuit (ASIC)
      C to HDL
      Comparison of Free EDA software
      Comparison of EDA Software
      Complex programmable logic device (CPLD)
      ELLA (programming language)
      Electronic design automation (EDA)
      Embedded C++
      Field Programmable Gate Array (FPGA)
      Hardware description language (HDL)
      Handel-C
      Icarus Verilog
      Lustre (programming language)
      MyHDL
      Open source software
      Register transfer notation
      Register transfer level (RTL)
      Ruby (hardware description language)
      SpecC
      SystemC
      SystemVerilog
      Systemverilog DPI
      VHDL
      VHDL-AMS
      Verilog
      Verilog-A
      Verilog-AMS

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